Intel 5 Series is a computing architecture introduced in 2008 that improves the efficiency and balances the use of communication channels in the motherboard. The architecture consists primarily of a central processing unit (CPU) (connected to the graphics card and memory) and a single chipset (connected to motherboard components). All motherboard communications and activities circle around these two devices.
The architecture is a product of adjustments made to the Intel 4 Series to deliver higher performance motherboards while maintaining efficiency and low power. The changes revolve around chipset and processor design, in conjunction with a rearrangement of functions and controllers. The result is the first major change in many years of computing.
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The concept of the architecture was to improve motherboard mechanics to keep pace with the CPU as it gained more speed and multiplied in number of cores. In the previous architecture, the CPU was communicating heavily with the motherboard’s central component, the Northbridge chipset, as it was the intermediary between the CPU, memory, and, in most cases, graphics card. CPU would communicate with the Northbridge chipset when it needed data from the memory or when it needed to output graphics to the display. This arrangement caused the communication channel known as the front-side bus (FSB) to be heavily used. It was not long till either the FSB would reach full capacity or operate inefficiently with more cores. A rearrangement of design was needed.
It was at one time proposed that the Northbridge be combined with CPU. This is almost what happened. The Northbridge housed the Integrated Memory Controller (IMC) and was given the designation Memory Controller Hub (MCH). It also housed the graphics controller (GFX). Both of these controllers have been moved to the processor. The CPU now has direct connections to the DDR3 memory and the PCI-E graphics (PEG) card removing the FSB channel and reliance on the Northbridge chipset.
The Northbridge also housed an Intel management engine (ME) and a display controller for integrated graphics. These two functions are moved to a new chipset called the Platform Controller Hub (PCH), part of the Intel 5 Series architecture. Along with a Northbridge chipset is a Southbridge chipset called the I/O Controller Hub (ICH). The ICH is integrated into the PCH, thus removing the Northbridge and Southbridge chipsets completely.
The PCH is connected to the CPU using a Direct Media Interface (DMI) as a communication channel. In the case where motherboard has integrated graphics, there is a display controller in the PCH that uses a Flexible Display Interface (FDI) for display communication with the CPU.
This setup allows for the CPU to directly communicate with the memory and graphics, which means no intermediary is involved. In comparison to before, the memory is given a separate connection to the CPU and graphics is given another connection. With a third line of communication going to the PCH, data traffic on all three lines should remain light for many years to come. In the mean time, power usage and heat dissipation will be low and efficient.
Intel 5 Series chipsets include[1][2]:
At least three server/workstation chipsets use an Ibex Peak family PCH and are not marketed under a "5 Series" chipset brand:
The Intel X58 Express chipset is marketed under a "5 Series" chipset brand but does not contain a PCH (much less Ibex Peak).